This application relates to evaluation of stress fields and properties in line features formed on substrates.
Measurements of various properties of a substrate and features fabricated on the substrate may have important applications. For example, manufacturing of certain devices requires fabrication of various features and components on a substrate (e.g., a semiconductor or a glass substrate). Such substrate-based integrated devices include, among others, integrated electronic circuits where micro circuit components are formed on a semiconductor substrate, integrated optical devices where micro optical components are fabricated on a substrate, micro-electro-mechanical systems where micro actuators and other mechanical components are fabricated on a semiconductor substrate, flat panel display systems where light-emitting elements, thin-film transistors and other elements are fabricated on a transparent substrate (e.g., a glass), or a combination of two or more of the above devices.
Different materials and different structures are usually formed on the substrate and are in contact with one another. Some devices may also use complex multilayer geometry. Hence, the interfacing of different materials and different structures may cause a complex stress state in each feature due to differences in the material properties and the structure properties at interconnections under different fabrication processes and environmental factors (e.g., variations or fluctuations in temperature). In fabrication of an integrated circuit, for example, the stress state of the interconnect conducting lines may be affected by film deposition, rapid thermal etching, chemical-mechanical polishing, and passivation during the fabrication process.
It is desirable to measure stresses on various features formed on the substrate to improve the design of the device structure, selection of materials, fabrication process, and other aspects of the devices so that the performance and reliability of the device can be enhanced. The stress measurements may be used to assess or evaluate the reliability of materials against failure from such phenomena as electromigration, stress-voiding and hillock formation. The stress measurements may also be used to facilitate quality control of the mechanical integrity and electromechanical functioning of circuit chip dies during large scale production in wafer fabrication facilities. In addition, the stress measurements may be used to improve the design of various thermal treatments (such as temperature excursions during passivation) and chemical and mechanical treatments (such as polishing) to reduce their contribution to the residual stresses in the final device.